我有一个使用 QEMU 运行的 ARM M55 程序(机器 =
mps3-an547
)。我已经使用这个document来定义__ROM_BASE在我的链接器脚本(0x1000_0000)中的位置 - 一切正常。
不幸的是,当试图编译一个更大的程序时,我得到错误抱怨闪存太小。查看上面链接的文档后,我可以看到在 0x1100_0000 处还有另一个代码区域,大小为 2MB:
我相应地更改了我的链接器脚本 __ROM_BASE 和 __ROM_SIZE,但生成的映像无法使用 QEMU 启动。
我想我可能需要在调用 QEMU 时使用 device loader 参数,但我不知道如何做。我试过了:
-device loader,data=0x11000000,data-len=0x111F_FFFF
(抱怨错误的数据长度格式)
这应该设置程序计数器(但这与我的代码区域的开始相同吗?
-device loader,addr=0x11000000,cpu-num=0
(崩溃)
我看过这个答案,但没有经验来理解问题的部分内容(例如,“我的 ELF 中的所有内容都在 0x40004000”是什么意思?
我显然不了解有关内存映射以及代码如何加载到 QEMU 中的一些事情,因此非常感谢任何指针。
我原来的链接描述文件:
/******************************************************************************
* @file gcc_arm.ld
* @brief GNU Linker Script for Cortex-M based device
* @version V2.2.0
* @date 16. December 2020
******************************************************************************/
/*
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
*-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
*/
/*---------------------- Flash Configuration ----------------------------------
<h> Flash Configuration
<o0> Flash Base Address <0x0-0xFFFFFFFF:8>
<o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
/* See https://developer.arm.com/documentation/dai0547/latest?_ga=2.157798205.688811587.1624957483-616249991.1623083451
*/
__ROM_BASE = 0x10000000;
__ROM_SIZE = 512K;
/*--------------------- Embedded RAM Configuration ----------------------------
<h> RAM Configuration
<o0> RAM Base Address <0x0-0xFFFFFFFF:8>
<o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
/* See https://developer.arm.com/documentation/dai0547/latest?_ga=2.157798205.688811587.1624957483-616249991.1623083451
*/
__RAM_BASE = 0x30000000;
__RAM_SIZE = 512K;
/*--------------------- Stack / Heap Configuration ----------------------------
<h> Stack / Heap Configuration
<o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
<o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__STACK_SIZE = 0x0000F000;
__HEAP_SIZE = 0x00000400;
/*
*-------------------- <<< end of configuration section >>> -------------------
*/
/* ARMv8-M stack sealing:
to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
*/
__STACKSEAL_SIZE = 0;
MEMORY
{
FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
* __StackSeal (only if ARMv8-M stack sealing is used)
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
/*
* SG veneers:
* All SG veneers are placed in the special output section .gnu.sgstubs. Its start address
* must be set, either with the command line option �--section-start� or in a linker script,
* to indicate where to place these veneers in memory.
*/
/*
.gnu.sgstubs :
{
. = ALIGN(32);
} > FLASH
*/
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
LONG ((__data_end__ - __data_start__) / 4)
/* Add each additional data section here */
/*
LONG (__etext2)
LONG (__data2_start__)
LONG ((__data2_end__ - __data2_start__) / 4)
*/
__copy_table_end__ = .;
} > FLASH
.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;
/* Add each additional bss section here */
/*
LONG (__bss2_start__)
LONG ((__bss2_end__ - __bss2_start__) / 4)
*/
__zero_table_end__ = .;
} > FLASH
/**
* Location counter can end up 2byte aligned with narrow Thumb code but
* __etext is assumed by startup code to be the LMA of a section in RAM
* which must be 4byte aligned
*/
__etext = ALIGN (4);
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data)
*(.data.*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
/*
* Secondary data section, optional
*
* Remember to add each additional data section
* to the .copy.table above to asure proper
* initialization during startup.
*/
/*
__etext2 = ALIGN (4);
.data2 : AT (__etext2)
{
. = ALIGN(4);
__data2_start__ = .;
*(.data2)
*(.data2.*)
. = ALIGN(4);
__data2_end__ = .;
} > RAM2
*/
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM AT > RAM
/*
* Secondary bss section, optional
*
* Remember to add each additional bss section
* to the .zero.table above to asure proper
* initialization during startup.
*/
/*
.bss2 :
{
. = ALIGN(4);
__bss2_start__ = .;
*(.bss2)
*(.bss2.*)
. = ALIGN(4);
__bss2_end__ = .;
} > RAM2 AT > RAM2
*/
.heap (COPY) :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
. = . + __HEAP_SIZE;
. = ALIGN(8);
__HeapLimit = .;
} > RAM
.stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
{
. = ALIGN(8);
__StackLimit = .;
. = . + __STACK_SIZE;
. = ALIGN(8);
__StackTop = .;
} > RAM
PROVIDE(__stack = __StackTop);
/* ARMv8-M stack sealing:
to use ARMv8-M stack sealing uncomment '.stackseal' section
*/
/*
.stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
{
. = ALIGN(8);
__StackSeal = .;
. = . + 8;
. = ALIGN(8);
} > RAM
*/
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
ASSERT(__StackTop <= ORIGIN(RAM) + LENGTH(RAM), "RAM overflowed")
}
和 Make 构建目标:
$(BINARY): $(OBJECTS) $(LIBS)
@$(CXX) $^ -T $(LINKER_SCRIPT) $(LDARGS) -o $@
其中
LINKER_SCRIPT
指向上面的链接描述文件。
制定在 QEMU 中运行镜像的目标:
run: $(BINARY)
@$(QEMU_DIR) \
-machine $(MACHINE_NAME) \
-cpu $(PROCESSOR_NAME) \
-m $(RAM_SIZE) \
-nographic \
-semihosting-config enable=on,target=native \
-kernel $(BINARY)
在适用于 ROM_BASE 设置为 0x1000_0000 的小程序之前,您用来加载文件的机制是什么?
如果您更改了链接描述文件,但现在它不起作用,那么最可能的解释不是“现在我需要使用不同的机制将文件加载到 QEMU”,而是“我的更改有问题链接描述文件”。您没有告诉我们任何有关您的链接描述文件中的内容的信息,因此很难说,但一种猜测是您的更改可能意味着向量表(必须位于内存中的固定位置)不再它应该在哪里。
QEMU 文档中指定了通用加载程序语法,但您可能不需要使用它。对于“加载单个 ELF 文件”,它的行为方式与“-kernel”选项基本相同(我怀疑这是您之前使用的)。 (你的具体问题是因为你试图使用“将我在命令行上指定的这个值写入内存”和“设置 PC”的语法,这都是你不需要的非常低级的东西为您的用例做。)
现在您已经提供了链接描述文件,我可以看到它确实将向量表放在 .text 部分(这就是
KEEP(*(.vectors))
行所做的)。这意味着 ROM_BASE 值必须是 CPU 查找向量表的地址(在该板上是 0x0 或该地址的别名 0x1000_0000)。如果您想将大部分代码放在不同的位置,则需要对链接描述文件进行更多重大更改,将向量表放入低内存,并将文本部分中的其余内容放入另一个更大的区域记忆。