MIPS 汇编 7 段显示按钮中断

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我有以下创建一个简单的 7 段显示计数器的 mips 代码文件

asm_file_trap:
    # If your program ends up in this loop then your ISR is not being exited correctly
    lui $s0, 0xf0a0
    li $t0, 0x86afafff     # "Err" on seven segment
    sw $t0, 0($s0)
    j asm_file_trap
    nop

sseg_display:

    move $t1, $a0
    move $t3, $0

    # Position 0
    andi $t2, $t1, 0xf
    sll $t2, $t2, 2
    addu $t2, $t2, $s0    # Calculate LUT address
    lw $t2, 0($t2)
    or $t3, $t3, $t2

    # Position 1
    andi $t2, $t1, 0xf0
    srl $t2, $t2, 2
    addu $t2, $t2, $s0    # Calculate LUT address
    lw $t2, 0($t2)
    sll $t2, $t2, 8
    or $t3, $t3, $t2

    # Position 2
    andi $t2, $t1, 0xf00
    srl $t2, $t2, 6
    addu $t2, $t2, $s0    # Calculate LUT address
    lw $t2, 0($t2)
    sll $t2, $t2, 16
    or $t3, $t3, $t2

    # Position 3
    andi $t2, $t1, 0xf000
    srl $t2, $t2, 10
    addu $t2, $t2, $s0    # Calculate LUT address
    lw $t2, 0($t2)
    sll $t2, $t2, 24
    or $t3, $t3, $t2

    # Write to seven segment and increment
    jr $ra
    sw $t3, 0($s2)

sseg_lut:
    .word     0xc0    # 0
    .word    0xf9    # 1
    .word    0xa4    # 2
    .word    0xb0    # 3
    .word    0x99    # 4
    .word    0x92    # 5
    .word    0x82    # 6
    .word    0xf8    # 7
    .word    0x80    # 8
    .word    0x90    # 9
    .word    0x88    # a
    .word    0x83    # b
    .word    0xc6    # c
    .word    0xa1    # d
    .word    0x86    # e
    .word    0x8e    # f`

我正在尝试添加一个按钮中断,每次按下它时都会重置计数器并显示 0。

这是我当前的代码。它成功工作一次然后按钮中断之后就没有了。

li $sp, 0x10fffffc    # Stack pointer initialization
li $s0, sseg_lut    # Lookup table address used by sseg_display
lui $s1, 0xf070    # Interrupt controller register
lui $s2, 0xf0a0    # Seven segment display


#enable interrupts
li $iv, isr
li $t1, 0b1001         # mask bits
sw $t1, 0($s1)        # enable interrupts

#main loop
main:
    jal sseg_display
    nop
    addiu $a0, $a0, 1
    j main
    nop


#interrupt service routine
isr:
    subu $a0, $a0 $a0    # reset counter
    sw $0, 4($s1)    # clear interrupt status
    jr $ir
    sw $t1, 0($s1)    # enable interrupts in mask
mips interrupt
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