减少 - 装配时DAW不工作

问题描述 投票:-1回答:1

我是组件用于微控制器PIC18F458的新手。我被要求在单位和数十7段显示计数序列编号99到00。

我使用以下代码,但DAW无法正常工作我该怎么办?

        ORG     0000H
COUNT   EQU     0X0FF   ; Use location 25H for counter
        CLRF    TRISB
R1      EQU     07
R2      EQU     08
R3      EQU     09
R4      EQU     10
        MOVLW   00H
        MOVWF   R1
REP1:
        MOVWF   PORTB
        CALL    DELAY
        INCF    PORTB,F
        MOVF    PORTB,W
        DAW
        GOTO    REP1
DELAY:
        MOVLW   D'20'
        MOVWF   R4
BACK:   
        MOVLW   D'100'
        MOVWF   R3
AGAIN:  
        MOVLW   D'250'
        MOVWF   R2
HERE:
        NOP
        NOP
        DECF    R2,F
        BNZ     HERE
        DECF    R3,F
        BNZ     AGAIN
        DECF    R4,F
        BNZ     BACK
        RETURN
        END
assembly pic
1个回答
0
投票

您发布的代码确实以您想要的方式工作。

您似乎错过的是使PIC18F458以正常方式“工作”所需的所有额外功能。

这是您在MPLAB模拟器中工作的代码:

;
;   Filename:       main.asm
;   Author:         dan1138
;   Target:         PIC18F458
;   Assembler:      MPASMWIN v5.22
;   Assembler mode: Absolute
;
;   Files required: p18f458.inc
;
;   Description:
;
;   Increment a BCD value in the PORTB output latch register.
;
    list P=18F458, r=dec, n=0, c=255
#include "p18f458.inc"
;
; Setup configuration words
    config OSC      = HS
    config BOR      = OFF
    config BORV     = 45
    config PWRT     = OFF
    config WDTPS    = 128
    config WDT      = OFF
    config STVR     = ON
    config LVP      = OFF
    config CP0 = OFF, CP1 = OFF, CP2 = OFF, CP3 = OFF
    config CPD = OFF, CPB = OFF
    config WRT0 = OFF, WRT1 = OFF, WRT2 = OFF, WRT3 = OFF
    config WRTD = OFF, WRTB = OFF, WRTC = OFF
    config EBTR0 = OFF, EBTR1 = OFF, EBTR2 = OFF, EBTR3 = OFF
    config EBTRB = OFF
;
;   /* Specify the System clock frequency in Hz */
#define FSYS 10000000

;   /* Specify the Peripheral clock frequency in Hz */
#define FCYC (FSYS/4)
;
; Power On Reset entry point
    org     0
    goto    start
;
; Interrupt Service Routine entry point
    org 0x08
ISR_vevtor:
    retfie  1
;
; Declare application RAM in access bank
 cblock 0x07
    R1:1
    R2:1
    R3:1
    R4:1
 endc
;
; Main application start
start:
    clrf    INTCON          ; Disable all interrupts
    movlw   0x07
    movwf   ADCON1          ; Make ADC analog inputs digital I/O pins
    movlw   0x07
    movwf   CMCON           ; Make comparator analog inputs digital I/O pins
;
; Main application loop
        CLRF    TRISB       ; Make PORTB pins digital output
        MOVLW   00H
        MOVWF   R1          ; Set RAM location R1 to zero, don't know why.
        MOVLW   00H         ; Load WREG with initial BCD value
REP1:
        MOVWF   LATB        ; Write the WREG to PORTB outputs
        CALL    DELAY       ; Wait for about one second with a 10MHz system clock
        INCF    LATB,W      ; Increment output latch, put result in the WREG
        DAW                 ; Adjust the value in WREG to be BCD
        GOTO    REP1        ; Do it again.
DELAY:
        MOVLW   D'20'       ; Delay for about one second.
        MOVWF   R4          ; You figure out how it works.
BACK:   
        MOVLW   D'100'
        MOVWF   R3
AGAIN:  
        MOVLW   D'250'
        MOVWF   R2
HERE:
        NOP
        NOP
        DECF    R2,F
        BNZ     HERE
        DECF    R3,F
        BNZ     AGAIN
        DECF    R4,F
        BNZ     BACK
        RETURN
    end
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