我已通过 Jtag、tftpboot 将 linux 启动到我的 ZYNQ 7000 (AVNET) 板上。接下来，使其从 QSPI 启动。
本项目的目的是通过DMA在PS和PL之间传输数据。我使用 VIVADO 完成了设计，并使用 Petalinux 将 linux 引导到板上。现在我想写一个测试代码来看看数据传输功能是否工作。当我运行代码时，它挂起“寻找中断”。因此，我想检查我的中断是否有效。所以我在我的板终端中尝试了 cat/proc/interrupts 命令，得到了 30 到 38 个中断号，如下所示（下面的示例仅显示 30 个）
30：0 0 GIC-0 46级f8003000.dma.controller
我的system-user.dtsi文件如下：
/include/ "system-conf.dtsi"
/ {
chosen {
bootargs = "earlycon clk_ignore_unused uio_pdrv_genirq.of_id=generic-uio rootwait quiet loglevel=0";
stdout-path = "serial0:115200n8";
};
};
&axi_dma_0 {
compatible = "generic-uio";
interrupt-parent = <0x1>;
interrupts = <0 29 4 0 30 4>;
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
flash0: flash@0 {
compatible = "n25q512a","micron,m25p80","jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
};
};
问题是，从 cat /proc/interrupts 的输出中我可以假设我的中断正在工作吗？
编辑：当有数据可用于来自 uio 的读取命令时，如何找到应该生成的中断号？
我有一块 ZYNQ(7020) 板，具有相同的启动模式。如果要识别spi和flash的工作状态，请按以下步骤操作：
m25p80 spi0.0: is25wp512 (65536 Kbytes) 6 ofpart partitions found on MTD device spi0.0 Creating 6 MTD partitions on "spi0.0": 0x000000000000-0x00000007e000 : "u-boot" mtd: partition "u-boot" doesn't end on an erase block -- force read-only 0x00000007e000-0x000000080000 : "uboot env" mtd: partition "uboot env" doesn't start on an erase block boundary -- force read-only 0x000000080000-0x000000a00000 : "boot" 0x000000a00000-0x000001a00000 : "rootfs" 0x000001a00000-0x000002000000 : "set" 0x000002000000-0x000004000000 : "tffs"
写入：你的nor flash只有一个分区，不要写入/flashcp到/dev/mtd0，因为uboot镜像存储在位置0。
读取/dev/mtd0后你会发现中断增加，查看日志：
# cat /proc/cpuinfo processor : 0 model name : ARMv7 Processor rev 0 (v7l) BogoMIPS : 766.66 Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpd32 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x3 CPU part : 0xc09 CPU revision : 0 processor : 1 model name : ARMv7 Processor rev 0 (v7l) BogoMIPS : 766.66 Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpd32 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x3 CPU part : 0xc09 CPU revision : 0 Hardware : Xilinx Zynq Platform Revision : 0003 Serial : 0000000000000000 # cat /proc/interrupts |grep spi 144: 335239 0 GIC-0 51 Level e000d000.spi # cat /proc/interrupts CPU0 CPU1 16: 0 0 GIC-0 27 Edge gt 17: 0 0 GIC-0 43 Level ttc_clockevent 18: 3515245 42248 GIC-0 29 Edge twd 21: 43 0 GIC-0 39 Level f8007100.adc 141: 21 0 GIC-0 80 Level cdns-i2c 143: 714 0 GIC-0 59 Level xuartps 144: 335239 0 GIC-0 51 Level e000d000.spi 145: 581 0 GIC-0 79 Level mmc0 146: 0 0 GIC-0 45 Level f8003000.dmac 147: 0 0 GIC-0 46 Level f8003000.dmac 148: 0 0 GIC-0 47 Level f8003000.dmac 149: 0 0 GIC-0 48 Level f8003000.dmac 150: 0 0 GIC-0 49 Level f8003000.dmac 151: 0 0 GIC-0 72 Level f8003000.dmac 152: 0 0 GIC-0 73 Level f8003000.dmac 153: 0 0 GIC-0 74 Level f8003000.dmac 154: 0 0 GIC-0 75 Level f8003000.dmac 155: 0 0 GIC-0 40 Level f8007000.devcfg 161: 0 0 GIC-0 41 Edge f8005000.watchdog 162: 2 0 GIC-0 54 Level eth0 IPI1: 0 0 Timer broadcast interrupts IPI2: 143990 319310 Rescheduling interrupts IPI3: 38 72 Function call interrupts IPI4: 0 0 CPU stop interrupts IPI5: 0 0 IRQ work interrupts IPI6: 0 0 completion interrupts Err: 0 # hexdump -C /dev/mtd0 |more 00000000 fe ff ff ea fe ff ff ea fe ff ff ea fe ff ff ea |................| * 00000020 66 55 99 aa 58 4e 4c 58 00 00 00 00 00 00 00 00 |fU..XNLX........| 00000030 c0 08 00 00 e0 ba 00 00 00 00 00 00 00 00 00 00 |................| 00000040 e0 ba 00 00 00 00 00 00 c1 dd 18 fd 00 00 00 00 |................| 00000050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 000000a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| * 000008a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 000008c0 0f 00 00 ea 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 |................| 000008d0 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 |................| 000008e0 40 00 00 00 40 00 00 00 40 00 00 00 40 00 00 00 |@...@...@...@...| 000008f0 40 00 00 00 40 00 00 00 40 00 00 00 ef be ad de |@...@...@.......| 00000900 fe ff ff ea 12 00 00 ea 00 00 0f e1 1f 10 00 e2 |................| 00000910 1a 00 31 e3 1f 00 c0 13 13 00 80 13 c0 00 80 e3 |..1.............| 00000920 00 f0 29 e1 10 0f 11 ee 02 0a c0 e3 10 0f 01 ee |..).............| 00000930 84 00 9f e5 10 0f 0c ee 06 00 00 eb 1d 00 00 eb |................| 00000940 86 00 00 eb 15 0f 07 ee 9a 0f 07 ee 95 0f 07 ee |................| 00000950 1e ff 2f e1 eb ff ff ea 00 00 a0 e3 17 0f 08 ee |../.............| 00000960 15 0f 07 ee d5 0f 07 ee 9a 0f 07 ee 95 0f 07 ee |................| 00000970 10 0f 11 ee 02 0a c0 e3 07 00 c0 e3 02 00 80 e3 |................| # cat /proc/interrupts CPU0 CPU1 16: 0 0 GIC-0 27 Edge gt 17: 0 0 GIC-0 43 Level ttc_clockevent 18: 3564059 42857 GIC-0 29 Edge twd 21: 43 0 GIC-0 39 Level f8007100.adc 141: 21 0 GIC-0 80 Level cdns-i2c 143: 860 0 GIC-0 59 Level xuartps 144: 335409 0 GIC-0 51 Level e000d000.spi 145: 581 0 GIC-0 79 Level mmc0 146: 0 0 GIC-0 45 Level f8003000.dmac 147: 0 0 GIC-0 46 Level f8003000.dmac 148: 0 0 GIC-0 47 Level f8003000.dmac 149: 0 0 GIC-0 48 Level f8003000.dmac 150: 0 0 GIC-0 49 Level f8003000.dmac 151: 0 0 GIC-0 72 Level f8003000.dmac 152: 0 0 GIC-0 73 Level f8003000.dmac 153: 0 0 GIC-0 74 Level f8003000.dmac 154: 0 0 GIC-0 75 Level f8003000.dmac 155: 0 0 GIC-0 40 Level f8007000.devcfg 161: 0 0 GIC-0 41 Edge f8005000.watchdog 162: 2 0 GIC-0 54 Level eth0 IPI1: 0 0 Timer broadcast interrupts IPI2: 144133 319683 Rescheduling interrupts IPI3: 38 72 Function call interrupts IPI4: 0 0 CPU stop interrupts IPI5: 0 0 IRQ work interrupts IPI6: 0 0 completion interrupts Err: 0 #