错误 (10454)：Lab09_1.vhd(55) 处的 VHDL 语法错误：范围的右边界必须是常量

Question

我有一个 VHDL 学校项目，正在制作一个仅包含 if、id、ex 和 wb 的管道。我的想法是输入范围索引中的每个输入指令并进行循环。但我不断收到此错误：

Error (10454): VHDL syntax error at Lab09_1.vhd(55): right bound of range must be a constant

错误是我需要在 for 循环中使用常量，但我需要更改范围值。 这是我的代码：

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity Lab09_1 is
    port( clock,reset : in std_logic;
        data : in std_logic_vector(7 downto 0);
        opcode : in std_logic_vector(3 downto 0);
        rs,rt : in std_logic_vector(1 downto 0);
        hex0,hex1,hex2,hex3,hex4,hex5: out std_logic_vector(6 downto 0);
        hazard,ifetch,idecode,exec,wback : out std_logic);
end Lab09_1;
architecture code of Lab09_1 is
    --stage r0 r1 r2 r3
    constant r0: std_logic_vector(1 downto 0):="00"; --r0
    constant r1: std_logic_vector(1 downto 0):="10"; --r1
    constant r2: std_logic_vector(1 downto 0):="01"; --r2
    constant r3: std_logic_vector(1 downto 0):="11"; --r3
    signal r0x,r1x,r2x,r3x:std_logic_vector(7 downto 0);
    --stage t0 t1 t2 t3
    constant t0: std_logic_vector(2 downto 0):="001"; --1
    constant t1: std_logic_vector(2 downto 0):="010"; --2
    constant t2: std_logic_vector(2 downto 0):="011"; --3
    constant t3: std_logic_vector(2 downto 0):="100"; --4
    --array and class
    type instruction is record
        stage:std_logic_vector(2 downto 0);
                datax:std_logic_vector(7 downto 0);
        opcodex:std_logic_vector(3 downto 0);
        rsx,rtx:std_logic_vector(1 downto 0);
        crs,crt:std_logic_vector(7 downto 0);
        end record;
    type array_inst is array (natural range <>) of instruction;
    signal inst:array_inst(0 downto 10);
    --index for array
    signal index:integer;
begin
    process(clock, reset)
        begin
        if(reset='1')then
            for i in inst'range loop
                inst(i).stage <= (others => '0');
                inst(i).datax <= (others => '0');
                inst(i).opcodex <= (others => '0');
                inst(i).rsx <= (others => '0');
                inst(i).rtx <= (others => '0');
                        end loop;
        elsif(clock'event and clock='1')then
            --instruction fetch
            inst(index).stage <= t0;
            inst(index).datax <= data;
            inst(index).opcodex <= opcode;
            inst(index).rsx <= rs;
            inst(index).rtx <= rt;
            --check every inputted instruction
            for i in 0 to index loop
                --instruction decode
                if inst(i).stage=t0 then
                    inst(i).stage <= t1;
                    case rs is
                        when r0 => inst(i).crs <= r0x;
                        when r1 => inst(i).crs <= r1x;
                        when r2 => inst(i).crs <= r2x;
                        when r3 => inst(i).crs <= r3x;
                    end case;
                    case rt is
                        when r0 => inst(i).crt <= r0x;
                        when r1 => inst(i).crt <= r1x;
                        when r2 => inst(i).crt <= r2x;
                        when r3 => inst(i).crt <= r3x;
                    end case;
                --execution
                elsif inst(i).stage=t1 then
                    inst(i).stage <= t2;
                end if;
            end loop;
        end if;
    end process;
    index <= index + 1;
end code;

这是我的 for 循环出现错误：

for i in 0 to index loop
    --instruction decode
    if inst(i).stage=t0 then
        inst(i).stage <= t1;
        case rs is
                when r0 => inst(i).crs <= r0x;
            when r1 => inst(i).crs <= r1x;
            when r2 => inst(i).crs <= r2x;
            when r3 => inst(i).crs <= r3x;
        end case;
        case rt is
            when r0 => inst(i).crt <= r0x;
            when r1 => inst(i).crt <= r1x;
            when r2 => inst(i).crt <= r2x;
            when r3 => inst(i).crt <= r3x;
        end case;
    --execution
    elsif inst(i).stage=t1 then
        inst(i).stage <= t2;
    end if;
end loop;

有人知道如何解决吗？

Answer 1

就像错误所说，循环范围必须是恒定的。

您可以更换

for i in 0 to index loop 

具有恒定范围，并根据

index

信号的值有条件地执行循环。所以类似：

for i in inst'range loop
   if i <= index then
      -- Loop body....

另请注意，索引信号可能必须在进程外部以外的其他地方递增:)。如果您的原始代码有效，那么可能存在违反

inst

界限的风险。