需要两个球同时显示,VHDL只出现1个球

问题描述 投票:0回答:1

我正在创建一个程序,以便在同一显示器上实例化两个球,并且它们从显示器的侧面弹起。为了确保它们不会发生在同一位置,我为 x 和 y 位置添加了一个通用常量,并将其映射到每个球。在这种情况下,我可以对其进行硬编码(不需要循环,因为我只想出现 2 个球)

我很困惑,因为即使我实例化了两个 vga_sync,我也只能出现 1 个球。

vga_top.vhd

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY vga_top IS
    GENERIC (
        initial_x1 : INTEGER := 400;
        initial_y1 : INTEGER := 300;
        initial_x2 : INTEGER := 300;
        initial_y2 : INTEGER := 200;
        initial_x3 : INTEGER := 100;
        initial_y3 : INTEGER := 100
    );
    PORT (
        clk_in    : IN STD_LOGIC;
        vga_red   : OUT STD_LOGIC_VECTOR (2 DOWNTO 0);
        vga_green : OUT STD_LOGIC_VECTOR (2 DOWNTO 0);
        vga_blue  : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
        vga_hsync,vga_hsync2  : OUT STD_LOGIC;
        vga_vsync, vga_vsync2 : OUT STD_LOGIC
    );

END vga_top;

ARCHITECTURE Behavioral OF vga_top IS
    SIGNAL pxl_clk : STD_LOGIC;
    -- internal signals to connect modules
    SIGNAL S_red, S_green, S_blue : STD_LOGIC;
    SIGNAL S_red2, S_green2, S_blue2 : STD_LOGIC;
    SIGNAL S_red3, S_green3, S_blue3 : STD_LOGIC;
    SIGNAL S_vsync : STD_LOGIC;
    SIGNAL S_pixel_row, S_pixel_col : STD_LOGIC_VECTOR (10 DOWNTO 0);
    SIGNAL S_pixel_row2, S_pixel_col2 : STD_LOGIC_VECTOR (10 DOWNTO 0); -- Separate signals for the second ball
    SIGNAL S_pixel_row3, S_pixel_col3 : STD_LOGIC_VECTOR (10 DOWNTO 0);
    

    COMPONENT ball IS
        GENERIC (
            initial_x: INTEGER;
            initial_y: INTEGER
        );
        PORT (
            v_sync : IN STD_LOGIC;
            pixel_row : IN STD_LOGIC_VECTOR(10 DOWNTO 0);
            pixel_col : IN STD_LOGIC_VECTOR(10 DOWNTO 0);
            red : OUT STD_LOGIC;
            green : OUT STD_LOGIC;
            blue : OUT STD_LOGIC
        );
    END COMPONENT;

    COMPONENT vga_sync IS
        PORT (
            pixel_clk : IN STD_LOGIC;
            red_in    : IN STD_LOGIC;
            green_in  : IN STD_LOGIC;
            blue_in   : IN STD_LOGIC;
            red_out   : OUT STD_LOGIC;
            green_out : OUT STD_LOGIC;
            blue_out  : OUT STD_LOGIC;
            hsync     : OUT STD_LOGIC;
            vsync     : OUT STD_LOGIC;
            pixel_row : OUT STD_LOGIC_VECTOR (10 DOWNTO 0);
            pixel_col : OUT STD_LOGIC_VECTOR (10 DOWNTO 0)
        );
    END COMPONENT;

    component clk_wiz_0 is
        port (
            clk_in1  : in std_logic;
            clk_out1 : out std_logic
        );
    end component;

BEGIN
    -- vga_driver only drives MSB of red, green & blue
    -- so set other bits to zero

    vga_red(1 DOWNTO 0) <= "00";
    vga_green(1 DOWNTO 0) <= "00";
    vga_blue(0) <= '0';

    add_ball1 : ball
        GENERIC MAP (
            initial_x => initial_x1,
            initial_y => initial_y1
        )
        PORT MAP (
            v_sync    => S_vsync,
            pixel_row => S_pixel_row,
            pixel_col => S_pixel_col,
            red       => S_red,
            green     => S_green,
            blue      => S_blue
        );

    add_ball2 : ball
        GENERIC MAP (
            initial_x => initial_x2,
            initial_y => initial_y2
        )
        PORT MAP (
            v_sync    => S_vsync,
            pixel_row => S_pixel_row2,
            pixel_col => S_pixel_col2,
            red       => S_red2,
            green     => S_green2,
            blue      => S_blue2
        );

    add_ball3 : ball
        GENERIC MAP (
            initial_x => initial_x3,
            initial_y => initial_y3
        )
        PORT MAP (
            v_sync    => S_vsync,
            pixel_row => S_pixel_row3,
            pixel_col => S_pixel_col3,
            red       => S_red3,
            green     => S_green3,
            blue      => S_blue3
        );


    vga_driver : vga_sync
        PORT MAP (
            --instantiate vga_sync component
            pixel_clk => pxl_clk,
            red_in    => S_red,
            green_in  => S_green,
            blue_in   => S_blue,
            red_out   => vga_red(2),
            green_out => vga_green(2),
            blue_out  => vga_blue(1),
            pixel_row => S_pixel_row,   -- Use separate signals for the first ball
            pixel_col => S_pixel_col    -- Use separate signals for the first ball
        );
        
            vga_driver2 : vga_sync
        PORT MAP (
            --instantiate vga_sync component for ball 2
            pixel_clk => pxl_clk,
            red_in    => S_red2,
            green_in  => S_green2,
            blue_in   => S_blue2,
            red_out   => vga_red(1),   -- You can assign different bits if needed
            green_out => vga_green(1), -- You can assign different bits if needed
            blue_out  => vga_blue(0),  -- You can assign different bits if needed
            pixel_row => S_pixel_row2,
            pixel_col => S_pixel_col2,
            hsync     => vga_hsync2,
            vsync     => S_vsync
        );


    vga_vsync <= S_vsync; --connect output vsync

    clk_wiz_0_inst : clk_wiz_0
    port map (
        clk_in1   => clk_in,
        clk_out1  => pxl_clk
    );

END Behavioral;

球.vhd

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY ball IS
    GENERIC (
        initial_x: INTEGER;
        initial_y: INTEGER
    );
    
    PORT (
        v_sync    : IN STD_LOGIC;
        pixel_row : IN STD_LOGIC_VECTOR(10 DOWNTO 0);
        pixel_col : IN STD_LOGIC_VECTOR(10 DOWNTO 0);
        red       : OUT STD_LOGIC;
        green     : OUT STD_LOGIC;
        blue      : OUT STD_LOGIC
    );
END ball;

ARCHITECTURE Behavioral OF ball IS
    CONSTANT size  : INTEGER := 8;
    
    --BALL1
    SIGNAL ball_on : STD_LOGIC; -- indicates whether ball is over current pixel position
    -- current ball position - initialized to center of screen
    SIGNAL ball_x  : STD_LOGIC_VECTOR(10 DOWNTO 0) := CONV_STD_LOGIC_VECTOR(initial_x, 11);
    SIGNAL ball_y  : STD_LOGIC_VECTOR(10 DOWNTO 0) := CONV_STD_LOGIC_VECTOR(initial_y, 11);
    -- current ball motion - initialized to +4 pixels/frame
    SIGNAL ball_y_motion : STD_LOGIC_VECTOR(10 DOWNTO 0) := "00000000100";
    SIGNAL ball_x_motion : STD_LOGIC_VECTOR(10 DOWNTO 0) := "00000000100";
    
BEGIN

    red <= NOT ball_on; -- color setup for red ball on white background
    green <= '1';
    blue  <= NOT ball_on;
    -- process to draw ball current pixel address is covered by ball position
    bdraw : PROCESS (ball_x, ball_y, pixel_row, pixel_col) IS
    BEGIN
        IF (pixel_col >= ball_x - size) AND
         (pixel_col <= ball_x + size) AND
             (pixel_row >= ball_y - size) AND
             (pixel_row <= ball_y + size) THEN
                ball_on <= '1';
        ELSE
            ball_on <= '0';
        END IF;
        END PROCESS;
        -- process to move ball once every frame (i.e. once every vsync pulse)
        mball : PROCESS
        BEGIN
            WAIT UNTIL rising_edge(v_sync);
            -- allow for bounce off top or bottom of screen
            IF ball_y + size >= 600 THEN
                ball_y_motion <= "11111111100"; -- -4 pixels
            ELSIF ball_x + size >= 800 THEN
                 ball_x_motion <= "11111111100";
            ELSIF ball_x <= size THEN
                ball_x_motion <= "00000000100";          
            ELSIF ball_y <= size THEN
                ball_y_motion <= "00000000100"; -- +4 pixels
            END IF;
            ball_y <= ball_y + ball_y_motion; -- compute next ball position
            ball_x <= ball_x + ball_x_motion;
        END PROCESS;
END Behavioral;

我相信这与我的 vga_sync 过程有关,因为我没有正确组合球 1 和球 2 的像素。当我尝试将其组合并将其添加到 1 vga_sync 时,没有出现球。

   combined_red <= S_red or S_red2;
    combined_green <= S_green or S_green2;
    combined_blue <= S_blue or S_blue2; 
  vga_driver : vga_sync
    PORT MAP(
        --instantiate vga_sync component
      pixel_clk => pxl_clk, 
        red_in    => combined_red, 
        green_in  => combined_green, 
        blue_in   => combined_blue, 
        red_out   => vga_red(2), 
        green_out => vga_green(2), 
        blue_out  => vga_blue(1), 
        pixel_row => S_pixel_row, 
        pixel_col => S_pixel_col, 
        hsync     => vga_hsync, 
        vsync     => S_vsync
    );

您能帮忙吗?

vhdl
1个回答
0
投票

球实体被设计为在白色背景上绘制一个绿色的球:

red <= NOT ball_on;
green <= '1';
blue  <= NOT ball_on;

您需要重新考虑您的组合语句,您当前正在使用 or 运算符,它在这里无法实现您想要的功能。

如果您不确定为什么需要更改组合语句运算符,请尝试更改球实体的颜色输出以使用黑色背景,它应该与 or 运算符一起使用:

red <= '0';
green <= ball_on;
blue  <= '0';
© www.soinside.com 2019 - 2024. All rights reserved.