我设计了一个全加器,只是为了获得全加器的实践分层测试平台方法,包括设计、接口、事务类、生成器类、驱动程序类、监视器类、记分板类、环境类、测试程序和顶部试验台。 我得到以下输出:
------------------------------
Generator
------------------------------
a = 0, b = 1, c = 1
sum = 0, carry = 0
------------------------------
------------------------------
Driver
------------------------------
a = 0, b = 1, c = 1
sum = 0, carry = 0
------------------------------
------------------------------
Monitor
------------------------------
a = 0, b = 1, c = 1
sum = 0, carry = 0
------------------------------
Result is as Expected
------------------------------
Scoreboard
------------------------------
a = 0, b = 1, c = 1
sum = 0, carry = 0
------------------------------
$finish at simulation time 3000
V C S S i m u l a t i o n R e p o r t
Time: 3000 ps
监视器和记分板的输出似乎是错误的。请提供以下代码所需的必要修改,以便更正输出。
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 04/15/2024 10:31:04 AM
// Design Name:
// Module Name: tbench_top
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module tbench_top;
fa_if i_inf();
test t1(i_inf);
full_adder f1 (i_inf);
endmodule
module full_adder(fa_if inf);
wire s0, c0, c1;
half_adder HA1 (inf.a, inf.b, s0, c0);
half_adder HA2 (s0, inf.c, inf.s_out, c1);
assign inf.c_out = c0 | c1;
endmodule
module half_adder(a,b,s,c);
input a,b;
output s,c;
xor x1(s,a,b);
and a1(s,a,b);
endmodule
interface fa_if;
logic a, b, c;
logic s_out, c_out;
endinterface
class transaction;
// Stimulus are declared with rand keyword
rand bit a;
rand bit b;
rand bit c;
bit s_out;
bit c_out;
//Function for Displaying values of a, b, c and sum , carry 1
function void display(string name);
$display("------------------------------");
$display(" %s", name);
$display("------------------------------");
$display("a = %0d, b = %0d, c = %0d",a, b, c);
$display("sum = %0d, carry = %0d",s_out, c_out);
$display("------------------------------");
endfunction
endclass
class generator;
transaction trans; //Handle of Transaction class
mailbox gen2driv; //Mailbox declaration
function new(mailbox gen2driv); //creation of mailbox and constructor
this.gen2driv = gen2driv;
endfunction
task main();
repeat (1)
begin
trans = new();
trans.randomize();
trans.display("Generator");
gen2driv.put(trans);
end
endtask
endclass
class driver;
virtual fa_if vif;
mailbox gen2driv;
function new(virtual fa_if vif, mailbox gen2driv);
this.vif = vif;
this.gen2driv = gen2driv;
endfunction
task main;
repeat(1)
begin
transaction trans;
gen2driv.get(trans);
vif.a <= trans.a;
vif.b <=trans.b;
vif.c <=trans.c;
trans.s_out = vif.s_out;
trans.c_out = vif.c_out;
trans.display("Driver");
end
endtask
endclass
class monitor;
virtual fa_if vif;
mailbox mon2scb;
function new(virtual fa_if vif, mailbox mon2scb);
this.vif = vif;
this.mon2scb = mon2scb;
endfunction
task main;
repeat (1)
#3;
begin
transaction trans;
trans = new();
trans.a = vif.a;
trans.b = vif.b;
trans.c = vif.c;
trans.s_out = vif.s_out;
trans.c_out = vif.c_out;
mon2scb.put(trans);
trans.display("Monitor");
end
endtask
endclass
class scoreboard;
mailbox mon2scb;
function new(mailbox mon2scb);
this.mon2scb = mon2scb;
endfunction
task main;
transaction trans;
repeat (1)
begin
mon2scb.get(trans);
if(((trans.a ^ trans.b ^ trans.c) == trans.s_out) && ((trans.a & trans.b) |(trans.b & trans.c) |(trans.c & trans.a) == trans.c_out))
$display("Result is as Expected");
else
$error ("Wrong Result");
trans.display("Scoreboard");
end
endtask
endclass
class environment;
generator gen;
driver driv;
monitor mon;
scoreboard scb;
mailbox m1;
mailbox m2;
virtual fa_if vif;
function new(virtual fa_if vif);
this.vif = vif;
m1 = new();
m2 = new();
gen = new(m1);
driv = new(vif,m1);
mon = new(vif,m2);
scb = new(m2);
endfunction
task test();
fork
gen.main();
driv.main();
mon.main();
scb.main();
join
endtask
task run;
test();
//$finish;
endtask
endclass
program test(fa_if i_inf);
environment env;
initial
begin
env = new(i_inf);
env.run();
end
endprogram
half_adder
模块中存在连接错误。变化:
and a1(s,a,b);
至:
and a1(c,a,b);
您需要使用波形来调试模拟,例如VCD。当我查看全加器内部的波形时,我注意到一些信号是未知的。然后我追踪到半加法器。