我正在尝试在使用加法和移位法的 Verilog 中制作一个 4 位 X 4 位乘法器。但是,当我运行模拟时,结果值一直为 00。
这是我使用的代码:
`timescale 1ns / 1ps
module multi_8bit(
input clk,
input rstn,
input start,
input [3:0] a,
input [3:0] b,
output reg [7:0] result,
output reg done
);
localparam IDLE = 3'b000,
START = 3'b001,
LSB = 3'b010,
ADD = 3'b011,
SHIFT = 3'b100,
DONE = 3'b101;
reg [2:0] state, next_state;
reg [7:0] r_multiplicant;
reg [7:0] r_product;
reg [3:0] r_multiplier;
reg [2:0] r_count;
always @(posedge clk, negedge rstn)
begin
if(!rstn)
begin
state <= IDLE;
end
else
begin
state <= next_state;
end
end
always@(*)
begin
case(state)
IDLE:
begin
if(start)
next_state = START;
else
next_state = IDLE;
end
START:
begin
if(r_count != 0)
next_state = LSB;
else
next_state = DONE;
end
LSB:
begin
if(b[0])
next_state = ADD;
else
next_state = SHIFT;
end
ADD:
begin
next_state = SHIFT;
end
SHIFT:
begin
next_state = START;
end
DONE:
begin
end
endcase
end
always@(posedge clk, negedge rstn)
begin
if(!rstn)
begin
r_multiplicant <= 0;
r_multiplier <= 0;
r_product <= 0;
r_count <= 4;
result <= 0;
done <= 0;
end
else
begin
begin
case(state)
IDLE:
begin
end
START:
begin
r_multiplicant = a;
r_multiplier = b;
end
LSB:
begin
r_count <= r_count - 1;
end
ADD:
begin
r_product <= r_product + r_multiplicant;
end
SHIFT:
begin
r_multiplicant <= r_multiplicant << 1;
r_multiplier <= r_multiplier >> 1;
end
DONE:
begin
assign result = r_product;
end
endcase
end
end
end
endmodule
这是我使用的测试台代码:
`timescale 1ns / 1ps
module tb_multi_8bit();
reg clk;
reg rstn;
reg start;
reg [3:0] a;
reg [3:0] b;
wire [7:0] result;
always #10 clk = ~clk;
multi_8bit test(
.clk(clk),
.rstn(rstn),
.start(start),
.a(a),
.b(b),
.result(result)
);
initial
begin
clk = 0; rstn = 1; start = 0;
#15 rstn = 0;
#25 rstn = 1;
#20 start = 1;
#20 a[0] = 0; a[1] = 1; a[2] = 1; a[3] = 0;
b[0] = 0; b[1] = 0; b[2] = 0; b[3] = 1;
#20 a[0] = 0; a[1] = 1; a[2] = 1; a[3] = 0;
b[0] = 0; b[1] = 0; b[2] = 1; b[3] = 0;
#20 a[0] = 0; a[1] = 1; a[2] = 1; a[3] = 0;
b[0] = 0; b[1] = 0; b[2] = 0; b[3] = 1;
#50 $finish;
end
endmodule
我刚开始学习Verilog,这是我第一次使用shift函数,所以我不知道我在代码中犯了什么错误。