通过引用传递到System Verilog模块或Interface

Question

我想创建一个可重用的接口或模块，其中外部的内存元素的层次结构可以通过引用传递给它。我知道按照LRM不能对模块或接口进行传递，但有没有办法在不使用定义的情况下实现它。请参阅下面的测试用例，其中被注释掉的行显示良好的结果将在内存中给出正确的值，但我需要将层次结构传递给特定于此示例的接口，并且不能使接口更可重用。我想让badd结果调用工作，但不知道如何做到这一点：

----------------------------的Verilog --------------------- -------------

module t1_tb();

   reg clk;
   reg write;
   reg [4:0] address;
   reg [31:0] data_in;
   wire [31:0] data_out;

   mem_model mem_model (clk, write, address, data_in, data_out);

   mem_intf mem_intf(clk, address, mem_model.memory);

   initial 
     begin
       clk = 0;
       write = 0;
       address = 0;
       for (int i = 0; i < 32; i++)
           mem_model.memory[i] = 32'haaaaaaaa;

       forever clk = #5 ~clk;

     end

   initial 
     begin
       #200;
       $display ("memory locations are %h and %h \n", mem_model.memory[0], mem_model.memory[1]);
       $finish;
     end

endmodule

module mem_model(input clk, input write, input [4:0] address, input [31:0] data_in, output [31:0] data_out);

reg [31:0] memory [0:31];

assign data_out = memory[address];

always @(posedge clk)
  if (write)
     memory[address] <= data_in;

endmodule

interface mem_intf (input clk, input [4:0] add, input  logic [31:0] mem [0:31]);

   import "DPI-C" context send_int  = function void send_int_c  ();
   export "DPI-C" clks_delay        = task clks_delay; 

task clks_delay(input int unsigned usecs);

     for (int i = 0; i < (int'(usecs/3.33) * 1000); ++i)
         @(posedge clk);

endtask

task automatic mem_acc( input [4:0] add, ref reg  [31:0] memory1 [0:31] );
     #10;
     memory1[add] = '1;
     #10;
     $display ("memory locations are %h and %h and add is %h\n", memory1[0], memory1[1], add);

endtask

task monitor_interrupts (input [6:0] interrupts);
   send_int_c();
endtask

    initial 
      begin
       #100;
       mem_acc(0, mem);  //bad results
       //mem_acc(0, t1_tb.mem_model.memory); // good results
      end

endinterface

------------------- C函数-----------------

void send_int(void)
{
    printf("From C Sending Interrupt..\n");

}
extern void clks_delay(int seconds);

void clks_delay(int seconds)
{
        printk("From C clocks_delay: %uld\n", seconds);
}

Answer 1

但是您可以通过引用传递任何变量到端口。

interface mem_intf (input clk, input [4:0] add, ref logic [31:0] mem [0:31]);

请参见IEEE 1800-2017 LRM中的第23.3.3节“端口连接规则”

---

更新

另一种选择是使用bind构造来实例化接口，并向上引用内存。所有实例的内存名称必须相同。

interface mem_intf (input clk, input [4:0] add);
...

    initial 
      begin
       #100;
       mem_acc(0, memory);  //upward reference

      end

endinterface
module t1_tb();


   mem_model mem_model1 (clk, write, address, data_in, data_out);

   bind mem_model: mem_model1 mem_intf mem_intf(clk, address);