10500 VHDL 语法错误...靠近文本“端口”；除了“（”，或“'”，或“。”

Question

我正在尝试用 VHDL 代码制作一个 ALU 系统。我做过半加器和全加器。我需要使用它们制作一个 ALU 系统。我已经写了我的代码。我对“过程”和“如果”语句有疑问。在不使用它们的情况下，我可以毫无错误地编译我的代码，但我必须使用它们来制作类似 MUX 的东西。每当我使用 process 和 if 语句时，我都会收到下面列出的错误。

你能帮帮我吗？

这是我的代码：

library IEEE;
use IEEE.std_logic_1164.all;

entity myALU is
    port(
        A0,A1,A2,A3,B0,B1,B2,B3   : in   std_logic;
        P0,P1,P2 : in std_logic;
        C0,M : in std_logic;
        S0,S1,S2,S3  : out std_logic;
        C4 : out std_logic);
end myALU;

architecture myALU_a of myALU is
        component myha port
    ( A, B       : in   std_logic;
       SUM       : out std_logic;
        CARRY  : out std_logic);
        end component myha;

component myFA2 port(
        X,Y,Z     : in   std_logic;
        SUMM  : out std_logic;
        COUT      : out std_logic  );
end component myFA2;
        signal C1,C2,C3,B0X,B1X,B2X,B3X: std_logic;

begin
process (P0,P1,P2,A0,A1,A2,A3,B0,B1,B2,B3,C0,M)
begin
    if(P0='0' and P1='0' and P2='0') then
            FA1 : myFA2 port map(X => A0,Y => B0,Z >= C0,SUMM => S0,CARRY => C1);
            FA2 : myFA2 port map(X => A1,Y => B1,Z >= C1,SUMM => S1,CARRY => C2);
            FA3 : myFA2 port map(X => A2,Y => B2,Z >= C2,SUMM => S2,CARRY => C3);
            FA4 : myFA2 port map(X => A3,Y => B3,Z >= C3,SUMM => S3,CARRY => C4);
    elsif (P0='1' and P1='0' and P2='0') then
            B0X<= B0 xor M;
            B1X<= B1 xor M;
            B2X<= B2 xor M;
            B3X<= B3 xor M;         
            FA5 : myFA2 port map(A0,B0X,C0,S0,C1);
            FA6 : myFA2 port map(A1,B1X,C1,S1,C2);
            FA7 : myFA2 port map(A2,B2X,C2,S2,C3);
            FA8 : myFA2 port map(A3,B3X,C3,S3,C4);
    elsif (P0='0' and P1='1' and P2='0') then
            S0 <= A0 AND B0;
            S1 <= A1 AND B1;
            S2 <= A2 AND B2;    
            S3 <= A3 AND B3;
    elsif (P0='1' and P1='1' and P2='0') then
            S0 <= not(A0);
            S1 <= not(A1);
            S2 <= not(A2);  
            S3 <= not(A3);
    elsif (P0='0' and P1='0' and P2='1') then
            S0 <= A1;
            S1 <= A2;
            S2 <= A3;
            S3 <= '0';
    elsif (P0='1' and P1='0' and P2='1') then
            S0 <= '0';
            S1 <= A0;
            S2 <= A1;
            S3 <= A2;
    elsif (P0='0' and P1='1' and P2='1') then
            S0 <= A1;
            S1 <= A2;
            S2 <= A3;
            S3 <= A0;
    elsif (P0='1' and P1='1' and P2='1') then
            S0 <= A3;
            S1 <= A0;
            S2 <= A1;
            S3 <= A2;
    end if;
end process;
end myALU_a;

我已经删除了进程和除第一个之外的所有 if 语句。代码编译良好。但我需要所有的 if 语句。